Integrated circuits protected against reverse engineering and method for fabricating the same using vias without metal terminations
A Standard patent application filed on 03 January 2002 credited to Baukas, James P. ; Clark, William M. Jr. ; Chow, Lap-Wai

Details

Application number :

2002234201  

Application type :

Standard  

Application status :

LAPSED  

Under opposition :

No  

Proceeding type :

 

Invention title :

Integrated circuits protected against reverse engineering and method for fabricating the same using vias without metal terminations  

Inventor :

Baukas, James P. ; Clark, William M. Jr. ; Chow, Lap-Wai  

Agent name :

 

Address for service :

 

Filing date :

03 January 2002  

Associated companies :

 

Applicant name :

HRL LABORATORIES, LLC  

Applicant address :

3011 Malibu Canyon Road, Malibu, CA 90265-4799  

Old name :

 

Original Source :

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