Method for fabricating a power semiconductor device having a voltage sustaining layer with a terraced trench facilitating formation of floating islands
A Standard patent application filed on 03 October 2002 credited to Blanchard, Richard A.
;
Guillot, Jean-Michel
Details
Application number :
2002347807
Application type :
Standard
Application status :
LAPSED
Under opposition :
No
Proceeding type :
Invention title :
Method for fabricating a power semiconductor device having a voltage sustaining layer with a terraced trench facilitating formation of floating islands