Fpga integrated circuit having embedded sram memory blocks each with statically and dynamically controllable read mode
A Standard patent application filed on 15 December 1999 credited to Agrawal, Om P. ; Nguyen, Bai ; Sharpe-Geisler, Bradley A. ; Chang, Herman P.

Details

Application number :

18437  

Application type :

Standard  

Application status :

LAPSED  

Under opposition :

No  

Proceeding type :

 

Invention title :

Fpga integrated circuit having embedded sram memory blocks each with statically and dynamically controllable read mode  

Inventor :

Agrawal, Om P. ; Nguyen, Bai ; Sharpe-Geisler, Bradley A. ; Chang, Herman P.  

Agent name :

 

Address for service :

 

Filing date :

15 December 1999  

Associated companies :

 

Applicant name :

Lattice Semiconductor Corporation  

Applicant address :

 

Old name :

 

Original Source :

Go  

Same Inventor

• Fpga integrated circuit having embedded sram memory blocks and...
• Efficient interconnect network for use in fpga device having...
• Methods for configuring fpga's having variable grain components for...
• Methods for configuring fpga's having variable grain blocks and...
• Methods for configuring fpga's for providing symmetric routing to...