Method and apparatus for instruction set architecture having dyadic digital signal processing instructions
A Standard patent application filed on 25 January 2001 credited to Kanapathipiillai, Ruban
;
Ganapathy, Kumar
Details
Application number :
2001231182
Application type :
Standard
Application status :
LAPSED
Under opposition :
No
Proceeding type :
Invention title :
Method and apparatus for instruction set architecture having dyadic digital signal processing instructions