Power line harmonic reduction by hybrid parallel active/passive filter system with square wave inverter and dc bus control
A Standard patent application filed on 19 June 1997 credited to Cheng, Po-Tai ; Divan, Deepakraj M ; Bhattacharya, Subhashish

Details

Application number :

35730  

Application type :

Standard  

Application status :

LAPSED  

Under opposition :

No  

Proceeding type :

 

Invention title :

Power line harmonic reduction by hybrid parallel active/passive filter system with square wave inverter and dc bus control  

Inventor :

Cheng, Po-Tai ; Divan, Deepakraj M ; Bhattacharya, Subhashish  

Agent name :

 

Address for service :

 

Filing date :

19 June 1997  

Associated companies :

 

Applicant name :

Wisconsin Alumni Research Foundation  

Applicant address :

 

Old name :

 

Original Source :

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