Digital clock dejitter circuits for regenerating clock signals with minimal jitter
A Standard patent application filed on 08 December 1992 credited to Wolvaver, Dan H
;
Upp, Daniel C.
Details
Application number :
32423
Application type :
Standard
Application status :
LAPSED
Under opposition :
No
Proceeding type :
Invention title :
Digital clock dejitter circuits for regenerating clock signals with minimal jitter