Technique for fabricating logic elements using multiple gate layers
A Standard patent application filed on 25 June 2003 credited to Mokhlesi, Nima ; Lutze, Jeffrey

Details

Application number :

2003281425  

Application type :

Standard  

Application status :

LAPSED  

Under opposition :

No  

Proceeding type :

 

Invention title :

Technique for fabricating logic elements using multiple gate layers  

Inventor :

Mokhlesi, Nima ; Lutze, Jeffrey  

Agent name :

 

Address for service :

 

Filing date :

25 June 2003  

Associated companies :

 

Applicant name :

SANDISK CORPORATION  

Applicant address :

140 Caspian Court, Sunnyvale, CA 94089  

Old name :

 

Original Source :

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