Method for depinning the fermi level of a semiconductor at an electrical junction and devices incorporating such junctions
A Standard patent application filed on 08 August 2003 credited to Connely, Daniel J.
;
Grupp, Daniel E.
Details
Application number :
2003255256
Application type :
Standard
Application status :
LAPSED
Under opposition :
No
Proceeding type :
Invention title :
Method for depinning the fermi level of a semiconductor at an electrical junction and devices incorporating such junctions