Method and apparatus for memory access scheduling to reduce memory access latency
A Standard patent application filed on 27 September 2002 credited to Crocker, Michael ; Aboulenein, Nagi ; Madavarapu, Vamsee ; Osbourne, Randy ; Huggahalli, Ramakrishna

Details

Application number :

2002330170  

Application type :

Standard  

Application status :

LAPSED  

Under opposition :

No  

Proceeding type :

 

Invention title :

Method and apparatus for memory access scheduling to reduce memory access latency  

Inventor :

Crocker, Michael ; Aboulenein, Nagi ; Madavarapu, Vamsee ; Osbourne, Randy ; Huggahalli, Ramakrishna  

Agent name :

 

Address for service :

 

Filing date :

27 September 2002  

Associated companies :

 

Applicant name :

INTEL CORPORATION  

Applicant address :

2200 Mission College Boulevard, Santa Clara, CA 95052  

Old name :

 

Original Source :

Go