Stacked nmos device biasing on mos integrated circuits and methods therefor
A Standard patent application filed on 25 September 2002 credited to Kaatz, Gary

Details

Application number :

2002327715  

Application type :

Standard  

Application status :

LAPSED  

Under opposition :

No  

Proceeding type :

 

Invention title :

Stacked nmos device biasing on mos integrated circuits and methods therefor  

Inventor :

Kaatz, Gary  

Agent name :

 

Address for service :

 

Filing date :

25 September 2002  

Associated companies :

 

Applicant name :

MOTOROLA, INC.  

Applicant address :

1303 East Algonquin Road, Schaumburg, IL 60196  

Old name :

 

Original Source :

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