Method and apparatus for supporting multiple cache line invalidations per cycle
A Standard patent application filed on 11 April 2002 credited to Chaudhry, Shailender ; Tremblay, Marc

Details

Application number :

2002250577  

Application type :

Standard  

Application status :

LAPSED  

Under opposition :

No  

Proceeding type :

 

Invention title :

Method and apparatus for supporting multiple cache line invalidations per cycle  

Inventor :

Chaudhry, Shailender ; Tremblay, Marc  

Agent name :

 

Address for service :

 

Filing date :

11 April 2002  

Associated companies :

 

Applicant name :

SUN MICROSYSTEMS, INC.  

Applicant address :

901 San Antonio Road, Palo Alto, CA 94303  

Old name :

 

Original Source :

Go  

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